• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    The present invention relates to a flight control system of an aircraft comprising: a first processing unit 1, a second processing unit 2, communication means configured to establish a first bidirectional digital link 3 and a second link bi-directional digital 4 between the first processing unit 1 and the second processing unit 2, said second link 4 being redundant with the first link 3, and said first 3 and second links 4 being able to be active concomitantly.
    公开号:FR3025626A1
    申请号:FR1458350
    申请日:2014-09-05
    公开日:2016-03-11
    发明作者:Celine Liu；Nicolas Marti；Stephen Langford
    申请人:Sagem Defense Securite SA；Turbomeca SA；
    IPC主号:
    专利说明:

    [0001] TECHNICAL FIELD The invention relates to a flight control system of an aircraft comprising two processing units or computers and constituting a two-way architecture. This system is particularly applicable to smaller engines such as helicopter engines.
    [0002] STATE OF THE ART The on-board flight control systems equipping aircraft such as existing aircraft or helicopters perform functions of control and regulation of the engine of the aircraft ensuring the proper functioning of the latter. Such functions are critical to the safety of passengers. Such systems must therefore be fault-tolerant. For this, the existing flight control systems generally include two processing units or computers, each capable of ensuring the proper operation of the engine. Such a system thus constitutes a two-way architecture in which each channel is capable of ensuring the execution of said critical functions in the event of failure of the other channel. In order to determine whether it should support the execution of these functions, each processing unit must be able to exchange information with the other processing unit of the control system, including information concerning the state of health of this other unit. treatment. To do this, the two processing units of the control system are generally connected by a bidirectional digital link, or two unidirectional links in opposite directions, such as a CCDL (Cross Chanel Data Link) link. In order to reinforce the failure resistance of such a flight control system, the processing units of the control system can be split into two remote boxes in order to be geographically distant from one another and thus to decrease. sensitivity to external aggression. In addition, in order to make the control system resistant to a data link failure between the processing units, the processing units can be connected by an additional link in the form of several discrete analog links, up to the number twenty on civil fadecs. Nevertheless increasing the number of links increases the probability that one of them will fail and increases the volume of wiring, thus making it difficult to develop a compact flight control system. Although an accessory for the control of large aircraft engines such as airliners, such compactness becomes essential to contain the total space requirement for the engine of a small aircraft, such as a helicopter engine. . There is therefore a need for a control system having a dual-channel architecture minimizing the amount of wiring while being resistant to external failures and aggression.
    [0003] SUMMARY OF THE INVENTION The present invention thus relates in a first aspect to a flight control system of an aircraft comprising: a first processing unit, a second processing unit, configured communication means to establish a first two-way digital link and a second bidirectional digital link between the first processing unit and the second processing unit, said second link being redundant with the first link, and said first and second links being capable of being active concomitantly. Such a system is highly resistant to failures due to the redundancy of its processing units and its communications means as well as the minimization of the number of communication links, while reducing its size. According to an advantageous and nonlimiting characteristic, the first and second links may be CCDL ("Cross Channel Data Link") links. Such a link notably allows the processing units to exchange more complex health information than those exchanged via the discrete analog links of the known systems while limiting the wiring volume.
    [0004] In case of failures of the first and second links, the flight control system may comprise backup communication means for ensuring data exchange between the first and second processing units. This avoids total blindness of the two-way system and a break in communications between the two processing units. According to an alternative embodiment, the backup communication means of the control system according to the first aspect may comprise an array of sensors or actuators. According to another variant embodiment, the backup communication means of the control system according to the first aspect may comprise an embedded secure network for the avionics, for example a redundant Ethernet network of the AFDX type ("Avionics Full DupleX switched ethernet" ) or pAFDX.
    [0005] The use of such networks to exchange information between the processing units makes it possible to increase the level of redundancy of the means of communication between the processing units and to ensure the operational safety of the flight control system without as well as requiring the establishment of additional means of communication dedicated solely to the communication between the processing units. According to an advantageous and nonlimiting characteristic, each processing unit of the control system according to the first aspect comprises means for verifying the integrity of data received on each of the links.
    [0006] This ensures that the received data has not been corrupted during transmission. Furthermore, each processing unit may comprise means for verifying, following the transmission of data on both the first link and the second link, the coherence of the data received on the first link and on the second link. . This enhances the ability of the system to detect data alterations exchanged between the processing units and thus minimizes the probability of failure of the flight control system. Furthermore, the communication means of the flight control system 20 according to the first aspect can be configured to transmit from a first processing unit to a second processing unit of the health data of the first processing unit, said system according to the first aspect further comprising means for selecting a processing unit for controlling an engine of said aircraft from the first and second processing units based on the health data of the first processing unit transmitted. and health data of the second processing unit. Such data exchange allows each processing unit to be aware of the health status of the other processing unit to ensure that the healthier route still provides control of the engine.
    [0007] Other features and advantages will be apparent from the following description of an embodiment. This description will be given with reference to the accompanying drawings in which: - Figure 1 schematically illustrates a flight control system according to one embodiment of the invention; FIG. 2 schematically illustrates hardware means for establishing two CCDL links between two processing units of a flight control system according to one embodiment of the invention; FIG. 3 schematically illustrates the physical segregation of CCDL modules of each processing unit of a flight control system according to one embodiment of the invention; FIG. 4 schematically illustrates the segregation of the hardware means of a processing unit for establishing two CCDL links according to one embodiment of the invention. DETAILED DESCRIPTION An embodiment of the invention, illustrated in FIG. 1, relates to a flight control system of an aircraft comprising at least a first processing unit 1 and a second processing unit 2. These two processing units are redundant and can each perform the functions of control and regulation of the engine of the aircraft. The system as illustrated in FIG. 1 thus constitutes a two-way architecture comprising a channel A and a channel B.
    [0008] The processing units 1 and 2 may be processors of the same multiprocessor computer system comprising several processors. In order to reinforce the resistance of the flight control system to external aggression and to prevent a single localized event from being able to deactivate the two treatment units 1 and 2, the two tracks can be installed remotely one of them. on the other in separate boxes. In such a configuration, the processing units are not integrated execution cores within a single processor. The system also comprises communication means 10 making it possible to connect the two processing units to enable the exchange of data essential for the proper functioning of each of the processing units, such as information on the state of health of the processing unit. opposite. This two-way system differs from known systems in that the communications means are configured to establish a first bi-directional digital link 3 and a second bidirectional digital link 4 between the first processing unit 1 and the second processing unit 2. Unlike known systems, such a system has no discrete link between the two processing units, which limits the complexity of its wiring and the probability that one of the communication links fails. The second link 4 is redundant with the first link 3 in order to ensure communication between the two processing units in the event of failure of the first link 3. Such redundancy guarantees, from the point of view of the exchange of information between the two processing units, the same level of safety as that presented by the known systems. In addition, said first and second links may be active concomitantly. Thus, unlike known systems in which the redundant link is generally only used in case of failure of the first link, the flight control system can use the first link 3 and the second link 4 at the same time in normal operation. , that is to say in the absence of failure of one of the two links, and can take advantage of the concomitant use of these two links to check the absence of corruption of the data exchanged between the two units treatment. The first and second processing units 1 and 2 may use the Ethernet IEEE 802.3 or HLDC or SDLC protocol or any other protocol having an error detection or correction function to communicate with each other via the two links 3 and 4. An Ethernet link makes it possible in particular to ensure high performance, high environmental robustness, particularly with respect to lightning resistance and electromagnetic compatibility ("EMC") and high functional robustness. through the implementation of data integrity and flow control mechanisms. In addition the Ethernet protocol is an industry standard consistent with avionics communication technologies, such as AFDX ("Avionics Full DupleX switched ethernet") or pAFDX, and 15 maintenance. The first and second links may be Cross Channel Data Link (CCDL) links. Such a link makes it possible to synchronize each application with an accuracy less than one hundred microseconds. Such a link also makes it possible, instead of exchanging discrets, as in known systems, to exchange health information constructed by the hardware (hardware) or the software ("software"), useful information for the system. (acquisition, status, ...) and operating system (OS or "Operating System") or application system (AS or "Application System") functional data.
    [0009] Such CCDL links between the two processing units A and B are shown in FIG. 2. Each processing unit 1, 2 may comprise a system, for example a system on a chip (SoC), or a system on a chip. system consisting of a microprocessor and peripherals implemented in separate boxes or in an FPGA card, 5a, 5b having a first CCDL module (CCDLA) 6a, 6b for establishing the first CCDL link 3 and a second CCDL module (CCDLB) 7a, 7b to establish the second CCDL link 4. Each CCDL link having its own module, the independence of each of the CCDL links is enhanced and the probability of simultaneous failure of the two CCDL links is thus reduced. Each CCDL module can be connected to the interface input / output of its housing through a hardware interface Phy 8a, 8b, 8c, 8d and a transformer 9a, 9b, 9c, 9d.
    [0010] As illustrated in FIG. 3, the CCDL modules of each processing unit can be segregated physically by being arranged on the system 5a, 5b at distinct locations and distant from each other, for example by placing them each at a corner of the system. . Alternatively, these CCDL modules can be arranged on separate chips. This makes it possible to reduce the probability of common failure in the event of SEU ("Single Event Upset") or MBU ("Multiple Bit Upset") alterations. According to a first variant, each system 5a, 5b is powered by a separate power supply. According to a second variant, in addition to a power supply 15 common to the entire system-on-a-chip, each system-on-a-chip can be powered by two distinct clock signals 11 and 12, as shown in FIG. Thus, although they are not powered independently, the CCDL modules of each processing unit can be powered by independent clocks, which increases the fault-tolerance of the system-on-a-chip by preventing a failure of the system. clock of one of the CCDL modules can affect the other CCDL module. The CCDL modules of each processing unit can be synchronized using a local real time clock (HTR) mechanism 10a, 10b and a synchronization mechanism such as a synchronization window mechanism. Thus, in the event of loss of synchronization, each processing unit may operate due to its local clock and then synchronize again upon receipt of a valid signal. The local clock mechanism is programmable by the application and its programming is protected against alterations of type SEU ("Single Event Upset") or MBU ("Multiple Bit Upset"). The CCDL links can still continue to operate even in the absence of synchronization or in the event of a clock being lost.
    [0011] The system may further comprise backup communication means for providing data exchange between the first and second processing units and used only in the event of failures of the first and second links, to avoid communication outage. between the processing units. In a first embodiment illustrated in FIG. 1, these backup communication means may comprise an array of sensors or actuators 13. Such a network of sensors or actuators may for example be a sensor array or smart actuators ("smart-sensor", "smart-actuator"). Each processing unit can then be connected to this network 13 via a bus of the RS-485 type for transmitting information either analogically but numerically. In a second embodiment illustrated in FIG. 1, these backup communication means comprise an embedded secure network for avionics 14. Such an embedded secure network may for example be a redundant Ethernet network such as AFDX (FIG. "Avionics Full DupleX switched ethernet") or pAFDX. Such a network provides means for resource sharing, flow segregation as well as the determinism and availability required for aeronautical certifications. The digital signals transmitted through the two bidirectional links between the processing units being more sensitive to disturbances than the discrete analog signals transmitted on the plurality of discrete links of the existing systems, the integrity control and consistency of the data transmitted between the two remote processing units can be set up. Thus, each processing unit may comprise means for verifying the integrity of the data received via each of the bidirectional links. In order to verify the integrity of the data received, the different fields of each received frame can be verified, in particular in the case of an Ethernet link, the fields relating to the destination address, the source address, the type and frame length, MAC data, and stuffing data. A frame may be considered invalid if the length of this frame is not consistent with the length specified in the field length of the frame or if the bytes are not integer. A frame may also be considered invalid if the CRC (Cyclic Redundancy Check) calculated on reception of the frame does not correspond to the CRC received due to errors due for example to interference during the transmission. In addition, each processing unit may comprise means for checking following the transmission of data on both the first link 3 and 10 on the second link 4, the coherence of the data received on the two links that must convey the data. same information in the absence of failure or corruption of transmitted frames. In order to be able to control an engine of the aircraft, the flight control system must entrust this control to one of its two lanes. For this, each treatment unit must know the health status of the opposite treatment unit. To do this, the communication means of the system are configured to transmit, from a first processing unit to a second processing unit, data relating to the health of the first processing unit, and vice versa. Such health data is data allowing the selection of a pathway and the establishment of a complete system diagnosis. They may be: CCDL diagnostic data, signals necessary for the channel switching logic, operating system status data or applications, hardware diagnostic data, particularly sensors or actuators, The flight control system may include means for selecting for control of an engine of the aircraft, based on the health data of the first processing unit being transmitted. and health data of the second processing unit, a processing unit 1125 among the first and second processing units for ensuring the best operation of the flight control system. 12
    权利要求:
    Claims (9)
    [0001]
    REVENDICATIONS1. An aircraft flight control system comprising: a first processing unit (1), a second processing unit (2), communication means configured to establish a first bidirectional digital link (3) and a second bidirectional digital link (4) between the first processing unit (1) and the second processing unit (2), said second link (4) being redundant with the first link (3), and said first link (4) being second links (4) being able to be active concomitantly.
    [0002]
    The flight control system of claim 1, wherein the first (3) and second (4) links are Cross Channel Data Link (CCDL) links.
    [0003]
    3. The flight control system according to one of the preceding claims, comprising backup communication means making it possible to exchange data between the first (1) and second (2) processing units in the event of failures of the data. first (3) and second links (4).
    [0004]
    4. Flight control system according to the preceding claim, wherein the backup communication means comprise an array of sensors 25 or actuators (13). 13 3025626
    [0005]
    5. Flight control system according to one of claims 3 or 4, wherein the backup communication means comprise an embedded secure network for the avionics (14).
    [0006]
    6. Flight control system according to claim 5, wherein the embedded secure network (14) is a redundant Ethernet network type AFDX ("Avionics Full DupleX switched ethernet") or pAFDX.
    [0007]
    Flight control system according to one of the preceding claims, wherein each processing unit (1, 2) comprises means for verifying the integrity of data received on each of the links (3, 4).
    [0008]
    Flight control system according to one of the preceding claims, in which each processing unit (1, 2) comprises means for checking, following the transmission of data at a time on the first link (3). ) and on the second link (4), the coherence of the data received on the first link (3) and on the second link (4).
    [0009]
    An aircraft flight control system according to one of the preceding claims, wherein the communication means is configured to transmit from a first processing unit (1, 2) to a second processing unit (2). , 1) health data of the first processing unit (1,2), said system comprising means for selecting a processing unit for controlling an engine of said aircraft from the first (1,2) and the second (2.1) processing units based on the health data of the first transmitted processing unit and the health data of the second processing unit (2.1).
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    法律状态:
    2015-08-27| PLFP| Fee payment|Year of fee payment: 2 |
    2016-03-11| PLSC| Publication of the preliminary search report|Effective date: 20160311 |
    2016-08-22| PLFP| Fee payment|Year of fee payment: 3 |
    2017-01-13| CJ| Change in legal form|Effective date: 20161214 |
    2017-01-13| CD| Change of name or company name|Owner name: TURBOMECA, FR Effective date: 20161214 Owner name: SAGEM DEFENSE SECURITE, FR Effective date: 20161214 |
    2017-08-22| PLFP| Fee payment|Year of fee payment: 4 |
    2017-09-01| CD| Change of name or company name|Owner name: SAFRAN HELICOPTER ENGINES, FR Effective date: 20170727 Owner name: SAFRAN ELECTRONICS & DEFENSE, FR Effective date: 20170727 |
    2018-08-22| PLFP| Fee payment|Year of fee payment: 5 |
    2019-08-20| PLFP| Fee payment|Year of fee payment: 6 |
    2020-08-19| PLFP| Fee payment|Year of fee payment: 7 |
    2021-08-19| PLFP| Fee payment|Year of fee payment: 8 |
    优先权:
    申请号 | 申请日 | 专利标题
    FR1458350A|FR3025626B1|2014-09-05|2014-09-05|BI-TRACK ARCHITECTURE WITH REDUNDANT CCDL LINKS|FR1458350A| FR3025626B1|2014-09-05|2014-09-05|BI-TRACK ARCHITECTURE WITH REDUNDANT CCDL LINKS|
    KR1020187021423A| KR102213762B1|2014-09-05|2015-09-04|Two-way architecture with redundant ccdl's|
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